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NANYA NANYA

NT5TU32M16EG-BE_NANYA original franchise _DDR2 SDRAM_ spot auction

Model: NT5TU32M16EG-BE

Brand: NANYA  

Type: original        quantity: 36350

Package: BGA      batch number: 19+ROHS

Price: enquiry        sample: support           specification: contact customer service.

Description: DRAM chip DDR2 SDRAM 512MIT 32 MX16 1.8V 84 pin VFBGA

  • NT5TU32M16EG-BE
    Classification: memory > memory chip > DRAM chip
    04 November 2010, 00 hours and 00 minutes
    ECRCN:EAR99
    Supplier cage Code: SBJ77
    Density: 512MBIT
    DDR2 SDRAM
    Unit: 32 MX16
    Data bus width: 16 bits
    Maximum clock rate: 1066 MHz
    Maximum access time: 0.35NS
    Address bus width: 15 bits
    Maximum working current: 250mA
    Typical working voltage: 1.8V
    Maximum working voltage: 1.9V
    Minimum working voltage: 1.7V
    Minimum working temperature: 0 degree C
    Maximum working temperature: 85 degree C
    Basic package type: ball grid array
    Package name: BGA
    Supplier packing: BGA
    Package description: plastic ball grid array
    Lead shape: Ball
    Pin number: 84
    PCB:84
    Package length (mm): 12.5
    Package width (mm): 8
    Packing height (mm): 0.8 (max)
    Seat plane height (mm): 1.2 (max)
    Pin spacing (mm): 0.8

    NANYA Technologies is one of Taiwan‘s largest electronics producers. It was founded in 1995 and mainly produces a series of computer hardware products, such as memory, for some major international brands.
    For example, ASUS, ACER, and other early desktop notebook computers used most of the memory is produced in South Asia, is a typical OEM manufacturer.
    The laptop‘s memory performance is good, and the price is the lowest among the similar products.
    DDR2 SDRAM abbreviated as DDR2 is the second generation double-data-Rate Two Synchronous Dynamic Random Access Memory, which is a computer memory specification. It belongs to the SDRAM family of memory products, provides higher operating efficiency and lower voltage than DDR SDRAM, is the successor of DDR SDRAM (double data rate synchronous dynamic random access memory) is also popular memory products. It is developed by JEDEC (Joint Committee on electronic equipment Engineering).
    The structure and characteristics of DDR2 editor
    DDR2 memory has 240 pins (excluding positioning slot), and notebook memory is 200 pins.
    The positioning slot of the DDR2 memory is located between the sixty-fourth and sixty-fifth pins (the opposite side is between the 184th and 185th pins).
    DDR2 memory is encapsulated in FBGA (Fine Spacing Ball Grid Array), which is characterized by the memory chip pins under the particles.
    DDR2 memory needs 1.8V working voltage and 0.9V pull up voltage (data line).
    DDR2 Memory Each clock can read and write data at four times the speed of an external bus and run at four times the speed of an internal control bus.
    DDR2 memory mainly uses switching mode power supply circuit, and a few of them are supplied by voltage regulation mode.
    DDR2 definition editor
    DDR2SDRAM is a new generation memory technology standard developed by JEDEC (Joint Commission on Electronic Equipment Engineering). The biggest difference between DDR and previous DDR is that DDR2 has twice as much memory as previous DDR, although it uses the same basic mode of data transmission with clock up/down delays. Memory pre read capability (that is, 4bit data read prefetching). In other words, each clock in DDR2 memory can read/write data at four times the speed of the external bus and run at four times the speed of the internal control bus.
    In addition, because the DDR2 standard stipulates that all DDR2 memory is packaged in FBGA, which is different from the widely used TSOP / TSOP - II package, the FBGA package can provide better electrical performance and heat dissipation, providing a solid foundation for the stable operation of DDR2 memory and the development of future frequency. Recalling the history of DDR development, from the first generation of DDR200 applied to personal computers through DDR266, DDR333 to today‘s dual-channel DDR400 technology, the development of the first generation of DDR has reached the limit of technology, it is difficult to improve the speed of memory by conventional methods; with the development of Intel‘s latest processor technology, front-end bus pairs Memory bandwidth requirements are getting higher and higher, with a higher and more stable frequency of DDR2 memory will be the trend.
    New technologies adopted by DDR2
    In addition to the above differences, DDR2 introduces three new technologies: OCD, ODT, and Post CAS.
    OCD (Off-Chip Driver): So-called offline drive adjustment, DDR II can improve signal integrity through OCD. DDR II adjusts the voltage between them by adjusting the resistance value of pull-up / pull-down. OCD improves signal integrity by reducing the tilt of DQ-DQS and improves signal quality by controlling voltage.
    ODT:ODT is the built core termination resistor. We know that using DDR SDRAM on the motherboard requires a lot of terminal resistance to prevent the data line terminal from reflecting signals. It greatly increased the manufacturing cost of motherboard. In fact, different memory modules have different requirements for termination circuits. The termination resistance determines the signal ratio and reflectivity of the data line. The small termination resistance makes the signal reflection of the data line low but the signal-to-noise ratio low; the high termination resistance makes the signal-to-noise ratio of the data line high, but the signal reflection will also increase. Therefore, the terminal resistance on the motherboard can not match the memory module very well, but also affect the signal quality to a certain extent. DDR2 can build in the appropriate terminal resistance according to its own characteristics, which can ensure the best signal waveform. Using DDR2 can not only reduce the cost of the motherboard, but also get the best signal quality, which is incomparable with DDR.
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